Xilinx Inc. has extended its 16-nm Virtex UltraScale+ family with the launch of the VU19P, claiming the industry’s largest FPGA. The VU19P, with 35 billion transistors, offers the highest logic density and I/O count on a single chip.
The new FPGA will enable the emulation and prototyping of the most complex ASIC and SoC technologies, and the development of complex algorithms used in for artificial intelligence, machine learning, video processing, and sensor fusion. They also target test & measurement, compute, networking, aerospace, and defense applications.
Developers will be able to accelerate hardware validation, and begin software integration before their ASIC or SoC is available, said Sumit Shah, senior director, product line marketing and management, Xilinx.
Setting a new standard in FPGAs, the VU19P features:
Nine million system logic cells
Up to 1.5 terabits per second of DDR4 memory bandwidth
Up to 4.5 terabits per second of transceiver bandwidth
Over 2,000 user I/Os
The VU19P is 1.6× larger than its predecessor, the 20-nm Virtex UltraScale 440 FPGA, which was previously the industry's largest FPGA.
Xilinx also provides a set of debug, visibility tools, and IP for the VU19P to help developers design and validate their next-generation applications. Developers can also use the Xilinx
Vivado Design Suite to help reduce cost and tape-out risk, and improve efficiency and time-to-market.
The VU19P will be available in Fall 2020.
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